1. Field of the Invention
This invention generally relates to component carriers and more specifically to a system for facilitating the handling of pin grid array components during the production of electrical devices
2. Description of Related Art
Semiconductor devices have matured from simple circuit elements into complex components provided in a variety of integrated circuit packages, such as pin grid array (PGA) packages. This maturation has been accompanied by an increase in the complexity of handling these components during assembly and testing operations. For example, PGA components have a large number of terminals and can be quite expensive. Typically a number of PGA and other components occupy positions on a single circuit board.
PGA and similar components are more susceptible to damage from a number of external influences, such as mechanical shock and discharges of accumulated electrostatic charge, than were prior components. The consequence of potential damage and other factors has led to changes in transportation, assembly and testing procedures that utilize such components. Indeed, procedures for handling the components now contribute significantly to the success of electronic assembly production. For example, when electronic components comprised simple transistors, resistors and capacitors, all the components would be assembled on a board without prior testing. If a component failed, debugging procedures were used to isolate defective components; then they were replaced.
It no longer is economically feasible to replace PGA and other integrated circuits and similar components if they are mounted on a board. It is easier to discard the entire board with a number of valuable working components than it is to replace a single failed integrated circuit. Thus, present procedures involve component testing prior to assembly to minimize the risk of mounting a defective component. Although this adds costs to the assembly process, overall the added costs are less than those encountered when a board is assembled with a defective component and discarded.
The need to protect and test integrated circuits during assembly operations led to the development of chip carriers. Chip carriers are special enclosures or packages that house and protect an integrated circuit or the like during processing, production, testing and assembly operations. More specifically, a chip carrier orients an integrated circuit during the production process, assures proper placement and alignment of terminals for testing and for insertion into a printed circuit board. It eliminates stresses from the terminals and seals found in such an integrated circuit. Chip carriers have been so successful, that they now must protect a component from mechanical and electrical damage and provide access to all the terminals to facilitate component testing if the chip carrier is to be acceptable.
As the number of integrated circuit designs and packages have proliferated, so have the number of chip carrier configurations Indeed there are different chip carrier structures for different integrated circuit packages, including chip carriers exclusively for PGA circuits. The following United States Letters Patent disclose different chip carrier structures specifically adapted for use with such PGA circuits:
U.S. Pat. No. 4,549,651 (1985) Alemanni PA1 U.S. Pat. No. 4,620,632 (1986) Alemanni PA1 U.S. Pat. No. 4,765,471 (1988) Murphy
The Alemanni patents disclose one- and two-part chip carriers for PGA integrated circuits or components. The one-part chip carrier includes a thin flat base within an outer frame. Retention fingers overlap and engage the bottom face of a PGA component package to capture the package in the carrier. In the two-part chip carriers, a separate plate structure with retention fingers for a PGA component of a given size replaces the integral base. Retention fingers in the frame capture the separate plate structure. The two-part chip carrier allows a single outer frame to accommodate plates for a range of PGA component sizes.
The Murphy patent, that is assigned to the same assignee as the present invention, discloses a chip carrier that comprises an outer frame with a centrally disposed laminated plate comprising conductive and non-conductive materials. Apertures through the laminated plate receive the PGA terminals and isolate them from the conductive layers of the plate. The outer frame extends around the periphery of the plate to the protect the component and its terminals from mechanical damage. A plurality of cantilevered arms adjacent a central opening through a retainer lock the PGA component against the laminated plates. Locking posts at opposite ends of the retainer engage latches formed on the outer frame and secure the retainer to the frame thereby to sandwich the PGA component therebetween.
These systems are somewhat difficult to utilize, particularly in fully automated production lines. In the Alemanni patents, a special tooling must spread the four retention fingers apart and simultaneously allow a vacuum head to position the PGA component in proper alignment with the terminal apertures through the plate. A similar procedure locates the PGA chip on the insert plate on the two-part carrier. When one positions the insert inside the frame and forces the insert toward the base of the frame, lever arms cam outwardly and allow the flanged tips of clips to return and capture the insert. In the Murphy patent, the locking posts align along an axis along which the chip carrier normally travels. This retention system is subject to being dislodged if the carrier receives a shock along that axis. In all these carriers, one must centrally locate the PGA component with respect to the supporting plate. Moreover, one must take care to avoid the introduction of undo stresses to the PGA component particularly during transport. Otherwise, the terminals can bend or hermetic seals can break open.